Trinity Devboard PCB V1.0 Firmware. FreeRTOS is setup and the MCU reads IMU data over SPI fand Magnetometer data over I2C, each with a seperate task. Sensordata is then run though MadgwickAHRS and send over USB as serial packet data to use in trinity visualizer. Bare minimum functionality works and is replicated from the first prototype.
This commit is contained in:
@@ -0,0 +1,460 @@
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/*
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* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: CMSIS NN Library
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* Title: arm_pool_q7_HWC.c
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* Description: Pooling function implementations
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*
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* $Date: 17. January 2018
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* $Revision: V.1.0.0
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*
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* Target Processor: Cortex-M cores
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*
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* -------------------------------------------------------------------- */
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#include "arm_math.h"
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#include "arm_nnfunctions.h"
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#if defined (ARM_MATH_DSP)
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/**
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* @brief A few utility functions used by pooling functions
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*
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*
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*/
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static void buffer_scale_back_q15_to_q7(q15_t * buffer, q7_t * target, uint16_t length, uint16_t scale)
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{
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int i;
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for (i = 0; i < length; i++)
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{
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target[i] = (q7_t) (buffer[i] / scale);
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}
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}
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static void compare_and_replace_if_larger_q7(q7_t * base, // base data
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const q7_t * target, // compare target
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const uint16_t length // data length
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)
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{
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q7_t *pIn = base;
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const q7_t *pCom = target;
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union arm_nnword in;
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union arm_nnword com;
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uint16_t cnt = length >> 2;
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while (cnt > 0u)
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{
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in.word = *__SIMD32(pIn);
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com.word = *__SIMD32(pCom)++;
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// if version
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if (com.bytes[0] > in.bytes[0])
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in.bytes[0] = com.bytes[0];
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if (com.bytes[1] > in.bytes[1])
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in.bytes[1] = com.bytes[1];
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if (com.bytes[2] > in.bytes[2])
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in.bytes[2] = com.bytes[2];
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if (com.bytes[3] > in.bytes[3])
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in.bytes[3] = com.bytes[3];
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*__SIMD32(pIn)++ = in.word;
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cnt--;
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}
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cnt = length & 0x3;
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while (cnt > 0u)
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{
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if (*pCom > *pIn)
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{
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*pIn = *pCom;
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}
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pIn++;
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pCom++;
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cnt--;
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}
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}
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static void accumulate_q7_to_q15(q15_t * base, q7_t * target, const uint16_t length)
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{
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q15_t *pCnt = base;
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q7_t *pV = target;
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q31_t v1, v2, vo1, vo2;
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uint16_t cnt = length >> 2;
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q31_t in;
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while (cnt > 0u)
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{
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q31_t value = *__SIMD32(pV)++;
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v1 = __SXTB16(__ROR(value, 8));
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v2 = __SXTB16(value);
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#ifndef ARM_MATH_BIG_ENDIAN
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vo2 = __PKHTB(v1, v2, 16);
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vo1 = __PKHBT(v2, v1, 16);
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#else
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vo1 = __PKHTB(v1, v2, 16);
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vo2 = __PKHBT(v2, v1, 16);
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#endif
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in = *__SIMD32(pCnt);
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*__SIMD32(pCnt)++ = __QADD16(vo1, in);
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in = *__SIMD32(pCnt);
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*__SIMD32(pCnt)++ = __QADD16(vo2, in);
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cnt--;
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}
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cnt = length & 0x3;
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while (cnt > 0u)
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{
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*pCnt++ += *pV++;
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cnt--;
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}
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}
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#endif // ARM_MATH_DSP
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup Pooling
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* @{
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*/
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/**
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* @brief Q7 max pooling function
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* @param[in, out] Im_in pointer to input tensor
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* @param[in] dim_im_in input tensor dimention
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* @param[in] ch_im_in number of input tensor channels
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* @param[in] dim_kernel filter kernel size
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* @param[in] padding padding sizes
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* @param[in] stride convolution stride
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* @param[in] dim_im_out output tensor dimension
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* @param[in,out] bufferA pointer to buffer space for input
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* @param[in,out] Im_out pointer to output tensor
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* @return none.
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*
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* @details
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*
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* <b>Buffer size:</b>
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*
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* bufferA size: 0
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*
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* The pooling function is implemented as split x-pooling then
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* y-pooling.
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*
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* This pooling function is input-destructive. Input data is undefined
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* after calling this function.
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*
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*/
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void
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arm_maxpool_q7_HWC(q7_t * Im_in,
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const uint16_t dim_im_in,
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const uint16_t ch_im_in,
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const uint16_t dim_kernel,
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const uint16_t padding,
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const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
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{
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#if defined (ARM_MATH_DSP)
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/* Run the following code for Cortex-M4 and Cortex-M7 */
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int16_t i_x, i_y;
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/* first does the pooling along x axis */
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for (i_y = 0; i_y < dim_im_in; i_y++)
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{
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for (i_x = 0; i_x < dim_im_out; i_x++)
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{
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/* for each output pixel */
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q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in;
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q7_t *win_start;
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q7_t *win_stop;
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if (i_x * stride - padding < 0)
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{
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win_start = target;
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} else
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{
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win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in;
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}
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if (i_x * stride - padding + dim_kernel >= dim_im_in)
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{
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win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in;
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} else
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{
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win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in;
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}
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/* first step is to copy over initial data */
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/* arm_copy_q7(win_start, target, ch_im_in); */
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memmove(target, win_start, ch_im_in);
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/* start the max operation from the second part */
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win_start += ch_im_in;
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for (; win_start < win_stop; win_start += ch_im_in)
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{
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compare_and_replace_if_larger_q7(target, win_start, ch_im_in);
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}
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}
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}
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/* then does the pooling along y axis */
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for (i_y = 0; i_y < dim_im_out; i_y++)
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{
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/* for each output row */
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q7_t *target = Im_out + i_y * dim_im_out * ch_im_in;
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q7_t *row_start;
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q7_t *row_end;
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/* setting the starting row */
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if (i_y * stride - padding < 0)
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{
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row_start = Im_in;
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} else
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{
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row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in;
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}
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/* setting the stopping row */
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if (i_y * stride - padding + dim_kernel >= dim_im_in)
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{
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row_end = Im_in + dim_im_in * dim_im_in * ch_im_in;
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} else
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{
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row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in;
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}
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/* copy over the first row */
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/* arm_copy_q7(row_start, target, dim_im_out * ch_im_in); */
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memmove(target, row_start, dim_im_out * ch_im_in);
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/* move over to next row */
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row_start += ch_im_in * dim_im_in;
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for (; row_start < row_end; row_start += dim_im_in * ch_im_in)
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{
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compare_and_replace_if_larger_q7(target, row_start, dim_im_out * ch_im_in);
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}
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}
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#else
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/* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
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int16_t i_ch_in, i_x, i_y;
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int16_t k_x, k_y;
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for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
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{
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for (i_y = 0; i_y < dim_im_out; i_y++)
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{
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for (i_x = 0; i_x < dim_im_out; i_x++)
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{
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int max = -129;
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for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
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{
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for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
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{
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if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
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{
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if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
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{
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max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
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}
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}
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}
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}
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Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
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}
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}
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}
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#endif /* ARM_MATH_DSP */
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}
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/**
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* @brief Q7 average pooling function
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* @param[in,out] Im_in pointer to input tensor
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* @param[in] dim_im_in input tensor dimention
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* @param[in] ch_im_in number of input tensor channels
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* @param[in] dim_kernel filter kernel size
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* @param[in] padding padding sizes
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* @param[in] stride convolution stride
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* @param[in] dim_im_out output tensor dimension
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* @param[in,out] bufferA pointer to buffer space for input
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* @param[in,out] Im_out pointer to output tensor
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* @return none.
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*
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* @details
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*
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* <b>Buffer size:</b>
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*
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* bufferA size: 2*dim_im_out*ch_im_in
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*
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* The pooling function is implemented as split x-pooling then
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* y-pooling.
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*
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* This pooling function is input-destructive. Input data is undefined
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* after calling this function.
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*
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*/
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void
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arm_avepool_q7_HWC(q7_t * Im_in,
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const uint16_t dim_im_in,
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const uint16_t ch_im_in,
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const uint16_t dim_kernel,
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const uint16_t padding,
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const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
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{
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#if defined (ARM_MATH_DSP)
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/* Run the following code for Cortex-M4 and Cortex-M7 */
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q15_t *buffer = (q15_t *) bufferA;
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int16_t i_x, i_y;
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int16_t count = 0;
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/* first does the pooling along x axis */
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for (i_y = 0; i_y < dim_im_in; i_y++)
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{
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for (i_x = 0; i_x < dim_im_out; i_x++)
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{
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/* for each output pixel */
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q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in;
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q7_t *win_start;
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q7_t *win_stop;
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if (i_x * stride - padding < 0)
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{
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win_start = target;
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} else
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{
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win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in;
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}
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if (i_x * stride - padding + dim_kernel >= dim_im_in)
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{
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win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in;
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} else
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{
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win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in;
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}
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/* first step is to copy over initial data */
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arm_q7_to_q15_no_shift(win_start, buffer, ch_im_in);
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count = 1;
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/* start the max operation from the second part */
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win_start += ch_im_in;
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for (; win_start < win_stop; win_start += ch_im_in)
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{
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accumulate_q7_to_q15(buffer, win_start, ch_im_in);
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count++;
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}
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buffer_scale_back_q15_to_q7(buffer, target, ch_im_in, count);
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}
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}
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/* then does the pooling along y axis */
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for (i_y = 0; i_y < dim_im_out; i_y++)
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{
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/* for each output row */
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q7_t *target = Im_out + i_y * dim_im_out * ch_im_in;
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q7_t *row_start;
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q7_t *row_end;
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/* setting the starting row */
|
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if (i_y * stride - padding < 0)
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{
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row_start = Im_in;
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} else
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{
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row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in;
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}
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/* setting the stopping row */
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if (i_y * stride - padding + dim_kernel >= dim_im_in)
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{
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row_end = Im_in + dim_im_in * dim_im_in * ch_im_in;
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} else
|
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{
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row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in;
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}
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/* copy over the first row */
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arm_q7_to_q15_no_shift(row_start, buffer, dim_im_out * ch_im_in);
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count = 1;
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||||
/* move over to next row */
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row_start += ch_im_in * dim_im_in;
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for (; row_start < row_end; row_start += dim_im_in * ch_im_in)
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||||
{
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accumulate_q7_to_q15(buffer, row_start, dim_im_out * ch_im_in);
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count++;
|
||||
}
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buffer_scale_back_q15_to_q7(buffer, target, dim_im_out * ch_im_in, count);
|
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}
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||||
#else
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/* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
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||||
|
||||
int16_t i_ch_in, i_x, i_y;
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int16_t k_x, k_y;
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||||
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for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
|
||||
{
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||||
for (i_y = 0; i_y < dim_im_out; i_y++)
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||||
{
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for (i_x = 0; i_x < dim_im_out; i_x++)
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{
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int sum = 0;
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int count = 0;
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for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
|
||||
{
|
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for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
|
||||
{
|
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if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
|
||||
{
|
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sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
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count++;
|
||||
}
|
||||
}
|
||||
}
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Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* ARM_MATH_DSP */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Pooling group
|
||||
*/
|
||||
Reference in New Issue
Block a user