Trinity Devboard PCB V1.0 Firmware. FreeRTOS is setup and the MCU reads IMU data over SPI fand Magnetometer data over I2C, each with a seperate task. Sensordata is then run though MadgwickAHRS and send over USB as serial packet data to use in trinity visualizer. Bare minimum functionality works and is replicated from the first prototype.
This commit is contained in:
@@ -0,0 +1,171 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/*
|
||||
* FreeRTOS Kernel V10.6.2
|
||||
* Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE .
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* These parameters and more are described within the 'configuration' section of the
|
||||
* FreeRTOS API documentation available on the FreeRTOS.org web site.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* Section where include file can be added */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Ensure definitions are only used by the compiler, and not by the assembler. */
|
||||
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
|
||||
#include <stdint.h>
|
||||
extern uint32_t SystemCoreClock;
|
||||
#endif
|
||||
#ifndef CMSIS_device_header
|
||||
#define CMSIS_device_header "stm32wbxx.h"
|
||||
#endif /* CMSIS_device_header */
|
||||
|
||||
#define configENABLE_FPU 0
|
||||
#define configENABLE_MPU 0
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 1
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configCPU_CLOCK_HZ ( SystemCoreClock )
|
||||
#define configTICK_RATE_HZ ((TickType_t)1000)
|
||||
#define configMAX_PRIORITIES ( 56 )
|
||||
#define configUSE_SB_COMPLETED_CALLBACK ( 0 )
|
||||
#define configUSE_MINI_LIST_ITEM ( 1 )
|
||||
#define configMINIMAL_STACK_SIZE ((uint16_t)512)
|
||||
#define configTOTAL_HEAP_SIZE ((size_t)64000)
|
||||
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||
#define configHEAP_CLEAR_MEMORY_ON_FREE 0
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 8
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
|
||||
/* Defaults to size_t for backward compatibility, but can be changed
|
||||
if lengths will always be less than the number of bytes in a size_t. */
|
||||
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
|
||||
/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 2 )
|
||||
#define configTIMER_QUEUE_LENGTH 10
|
||||
#define configTIMER_TASK_STACK_DEPTH 1024
|
||||
|
||||
/* CMSIS-RTOS V2 flags */
|
||||
#define configUSE_OS2_THREAD_SUSPEND_RESUME 1
|
||||
#define configUSE_OS2_THREAD_ENUMERATE 1
|
||||
#define configUSE_OS2_EVENTFLAGS_FROM_ISR 1
|
||||
#define configUSE_OS2_THREAD_FLAGS 1
|
||||
#define configUSE_OS2_TIMER 1
|
||||
#define configUSE_OS2_MUTEX 1
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#define INCLUDE_xQueueGetMutexHolder 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
|
||||
/*
|
||||
* The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
|
||||
* by the application thus the correct define need to be enabled below
|
||||
*/
|
||||
#define USE_FreeRTOS_HEAP_4
|
||||
|
||||
/* Cortex-M specific definitions. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 4
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
function. */
|
||||
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* Normal assert() semantics without relying on the provision of an assert.h
|
||||
header file. */
|
||||
/* USER CODE BEGIN 1 */
|
||||
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
|
||||
standard names. */
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
/* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
|
||||
|
||||
#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0
|
||||
|
||||
/* USER CODE BEGIN Defines */
|
||||
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
|
||||
/* USER CODE END Defines */
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
@@ -0,0 +1,113 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file app_common.h
|
||||
* @author MCD Application Team
|
||||
* @brief App Common application configuration file for STM32WPAN Middleware.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef APP_COMMON_H
|
||||
#define APP_COMMON_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"{
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdarg.h>
|
||||
|
||||
#include "app_conf.h"
|
||||
|
||||
/* -------------------------------- *
|
||||
* Basic definitions *
|
||||
* -------------------------------- */
|
||||
#undef NULL
|
||||
#define NULL 0
|
||||
|
||||
#undef FALSE
|
||||
#define FALSE 0
|
||||
|
||||
#undef TRUE
|
||||
#define TRUE (!0)
|
||||
|
||||
/* -------------------------------- *
|
||||
* Critical Section definition *
|
||||
* -------------------------------- */
|
||||
#define BACKUP_PRIMASK() uint32_t primask_bit= __get_PRIMASK()
|
||||
#define DISABLE_IRQ() __disable_irq()
|
||||
#define RESTORE_PRIMASK() __set_PRIMASK(primask_bit)
|
||||
|
||||
/* -------------------------------- *
|
||||
* Macro delimiters *
|
||||
* -------------------------------- */
|
||||
#define M_BEGIN do {
|
||||
|
||||
#define M_END } while(0)
|
||||
|
||||
/* -------------------------------- *
|
||||
* Some useful macro definitions *
|
||||
* -------------------------------- */
|
||||
#ifndef MAX
|
||||
#define MAX( x, y ) (((x)>(y))?(x):(y))
|
||||
#endif
|
||||
|
||||
#ifndef MIN
|
||||
#define MIN( x, y ) (((x)<(y))?(x):(y))
|
||||
#endif
|
||||
|
||||
#define MODINC( a, m ) M_BEGIN (a)++; if ((a)>=(m)) (a)=0; M_END
|
||||
|
||||
#define MODDEC( a, m ) M_BEGIN if ((a)==0) (a)=(m); (a)--; M_END
|
||||
|
||||
#define MODADD( a, b, m ) M_BEGIN (a)+=(b); if ((a)>=(m)) (a)-=(m); M_END
|
||||
|
||||
#define MODSUB( a, b, m ) MODADD( a, (m)-(b), m )
|
||||
|
||||
#define PAUSE( t ) M_BEGIN \
|
||||
__IO int _i; \
|
||||
for ( _i = t; _i > 0; _i -- ); \
|
||||
M_END
|
||||
|
||||
#define DIVF( x, y ) ((x)/(y))
|
||||
|
||||
#define DIVC( x, y ) (((x)+(y)-1)/(y))
|
||||
|
||||
#define DIVR( x, y ) (((x)+((y)/2))/(y))
|
||||
|
||||
#define SHRR( x, n ) ((((x)>>((n)-1))+1)>>1)
|
||||
|
||||
#define BITN( w, n ) (((w)[(n)/32] >> ((n)%32)) & 1)
|
||||
|
||||
#define BITNSET( w, n, b ) M_BEGIN (w)[(n)/32] |= ((U32)(b))<<((n)%32); M_END
|
||||
|
||||
/* -------------------------------- *
|
||||
* Compiler *
|
||||
* -------------------------------- */
|
||||
#define PLACE_IN_SECTION( __x__ ) __attribute__((section (__x__)))
|
||||
|
||||
#ifdef WIN32
|
||||
#define ALIGN(n)
|
||||
#else
|
||||
#define ALIGN(n) __attribute__((aligned(n)))
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /*APP_COMMON_H */
|
||||
@@ -0,0 +1,681 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file app_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief Application configuration file for STM32WPAN Middleware.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef APP_CONF_H
|
||||
#define APP_CONF_H
|
||||
|
||||
#include "hw.h"
|
||||
#include "hw_conf.h"
|
||||
#include "hw_if.h"
|
||||
#include "ble_bufsize.h"
|
||||
|
||||
/******************************************************************************
|
||||
* Application Config
|
||||
******************************************************************************/
|
||||
/**< generic parameters ******************************************************/
|
||||
|
||||
/**
|
||||
* Define Tx Power
|
||||
*/
|
||||
#define CFG_TX_POWER (0x18) /* -0.15dBm */
|
||||
|
||||
/**
|
||||
* Define Advertising parameters
|
||||
*/
|
||||
#define CFG_ADV_BD_ADDRESS (0x11aabbccddee)
|
||||
|
||||
#define CFG_FAST_CONN_ADV_INTERVAL_MIN (0x80) /**< 80ms */
|
||||
#define CFG_FAST_CONN_ADV_INTERVAL_MAX (0xA0) /**< 100ms */
|
||||
#define CFG_LP_CONN_ADV_INTERVAL_MIN (0x640) /**< 1s */
|
||||
#define CFG_LP_CONN_ADV_INTERVAL_MAX (0xFA0) /**< 2.5s */
|
||||
#define ADV_TYPE
|
||||
#define BLE_ADDR_TYPE GAP_PUBLIC_ADDR
|
||||
#define ADV_FILTER
|
||||
/**
|
||||
* Define IO Authentication
|
||||
*/
|
||||
#define CFG_BONDING_MODE (0)
|
||||
#define CFG_ENCRYPTION_KEY_SIZE_MAX (16)
|
||||
#define CFG_ENCRYPTION_KEY_SIZE_MIN (8)
|
||||
|
||||
/**
|
||||
* Define IO capabilities
|
||||
*/
|
||||
#define CFG_IO_CAPABILITY_DISPLAY_ONLY (0x00)
|
||||
#define CFG_IO_CAPABILITY_DISPLAY_YES_NO (0x01)
|
||||
#define CFG_IO_CAPABILITY_KEYBOARD_ONLY (0x02)
|
||||
#define CFG_IO_CAPABILITY_NO_INPUT_NO_OUTPUT (0x03)
|
||||
#define CFG_IO_CAPABILITY_KEYBOARD_DISPLAY (0x04)
|
||||
|
||||
#define CFG_IO_CAPABILITY CFG_IO_CAPABILITY_DISPLAY_YES_NO
|
||||
|
||||
/**
|
||||
* Define MITM modes
|
||||
*/
|
||||
#define CFG_MITM_PROTECTION_NOT_REQUIRED (0x00)
|
||||
#define CFG_MITM_PROTECTION_REQUIRED (0x01)
|
||||
|
||||
#define CFG_MITM_PROTECTION CFG_MITM_PROTECTION_REQUIRED
|
||||
|
||||
/**
|
||||
* Define Secure Connections Support
|
||||
*/
|
||||
#define CFG_SECURE_NOT_SUPPORTED (0x00)
|
||||
#define CFG_SECURE_OPTIONAL (0x01)
|
||||
#define CFG_SECURE_MANDATORY (0x02)
|
||||
|
||||
#define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL
|
||||
|
||||
/**
|
||||
* Define Keypress Notification Support
|
||||
*/
|
||||
#define CFG_KEYPRESS_NOT_SUPPORTED (0x00)
|
||||
#define CFG_KEYPRESS_SUPPORTED (0x01)
|
||||
|
||||
#define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED
|
||||
|
||||
/**
|
||||
* Numeric Comparison Answers
|
||||
*/
|
||||
#define YES (0x01)
|
||||
#define NO (0x00)
|
||||
|
||||
/**
|
||||
* Device name configuration for Generic Access Service
|
||||
*/
|
||||
#define CFG_GAP_DEVICE_NAME "TEMPLATE"
|
||||
#define CFG_GAP_DEVICE_NAME_LENGTH (8)
|
||||
|
||||
/**
|
||||
* Define PHY
|
||||
*/
|
||||
#define ALL_PHYS_PREFERENCE 0x00
|
||||
#define RX_2M_PREFERRED 0x02
|
||||
#define TX_2M_PREFERRED 0x02
|
||||
#define TX_1M 0x01
|
||||
#define TX_2M 0x02
|
||||
#define RX_1M 0x01
|
||||
#define RX_2M 0x02
|
||||
|
||||
/**
|
||||
* Identity root key used to derive IRK and DHK(Legacy)
|
||||
*/
|
||||
#define CFG_BLE_IR {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0}
|
||||
|
||||
/**
|
||||
* Encryption root key used to derive LTK(Legacy) and CSRK
|
||||
*/
|
||||
#define CFG_BLE_ER {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21}
|
||||
|
||||
/**
|
||||
* SMPS supply
|
||||
* SMPS not used when Set to 0
|
||||
* SMPS used when Set to 1
|
||||
*/
|
||||
#define CFG_USE_SMPS 0
|
||||
|
||||
/* USER CODE BEGIN Generic_Parameters */
|
||||
|
||||
/* USER CODE END Generic_Parameters */
|
||||
|
||||
/**< specific parameters */
|
||||
/*****************************************************/
|
||||
|
||||
/* USER CODE BEGIN Specific_Parameters */
|
||||
|
||||
/* USER CODE END Specific_Parameters */
|
||||
|
||||
/******************************************************************************
|
||||
* BLE Stack
|
||||
******************************************************************************/
|
||||
/**
|
||||
* Maximum number of simultaneous connections that the device will support.
|
||||
* Valid values are from 1 to 8
|
||||
*/
|
||||
#define CFG_BLE_NUM_LINK 2
|
||||
|
||||
/**
|
||||
* Maximum number of Services that can be stored in the GATT database.
|
||||
* Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
|
||||
*/
|
||||
#define CFG_BLE_NUM_GATT_SERVICES 8
|
||||
|
||||
/**
|
||||
* Maximum number of Attributes
|
||||
* (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services)
|
||||
* that can be stored in the GATT database.
|
||||
* Note that certain characteristics and relative descriptors are added automatically during device initialization
|
||||
* so this parameters should be 9 plus the number of user Attributes
|
||||
*/
|
||||
#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
|
||||
|
||||
/**
|
||||
* Maximum supported ATT_MTU size
|
||||
* This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
|
||||
*/
|
||||
#define CFG_BLE_MAX_ATT_MTU (156)
|
||||
|
||||
/**
|
||||
* Size of the storage area for Attribute values
|
||||
* This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute:
|
||||
* - attribute value length
|
||||
* - 5, if UUID is 16 bit; 19, if UUID is 128 bit
|
||||
* - 2, if server configuration descriptor is used
|
||||
* - 2*DTM_NUM_LINK, if client configuration descriptor is used
|
||||
* - 2, if extended properties is used
|
||||
* The total amount of memory needed is the sum of the above quantities for each attribute.
|
||||
* This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
|
||||
*/
|
||||
#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
|
||||
|
||||
/**
|
||||
* Prepare Write List size in terms of number of packet
|
||||
* This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
|
||||
*/
|
||||
#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
|
||||
|
||||
/**
|
||||
* Number of allocated memory blocks
|
||||
* This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
|
||||
*/
|
||||
#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
|
||||
|
||||
/**
|
||||
* Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
|
||||
*/
|
||||
#define CFG_BLE_DATA_LENGTH_EXTENSION 1
|
||||
|
||||
/**
|
||||
* Sleep clock accuracy in Peripheral mode (ppm value)
|
||||
*/
|
||||
#define CFG_BLE_PERIPHERAL_SCA 500
|
||||
|
||||
/**
|
||||
* Sleep clock accuracy in Central mode
|
||||
* 0 : 251 ppm to 500 ppm
|
||||
* 1 : 151 ppm to 250 ppm
|
||||
* 2 : 101 ppm to 150 ppm
|
||||
* 3 : 76 ppm to 100 ppm
|
||||
* 4 : 51 ppm to 75 ppm
|
||||
* 5 : 31 ppm to 50 ppm
|
||||
* 6 : 21 ppm to 30 ppm
|
||||
* 7 : 0 ppm to 20 ppm
|
||||
*/
|
||||
#define CFG_BLE_CENTRAL_SCA 0
|
||||
|
||||
/**
|
||||
* LsSource
|
||||
* Some information for Low speed clock mapped in bits field
|
||||
* - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source
|
||||
* - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module
|
||||
* - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config
|
||||
*/
|
||||
#if defined(STM32WB5Mxx)
|
||||
#define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_HSE_1024)
|
||||
#else
|
||||
#define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_HSE_1024)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
|
||||
*/
|
||||
#define CFG_BLE_HSE_STARTUP_TIME 0x148
|
||||
|
||||
/**
|
||||
* Maximum duration of the connection event when the device is in Peripheral mode in units of 625/256 us (~2.44 us)
|
||||
*/
|
||||
#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF)
|
||||
|
||||
/**
|
||||
* Viterbi Mode
|
||||
* 1 : enabled
|
||||
* 0 : disabled
|
||||
*/
|
||||
#define CFG_BLE_VITERBI_MODE 1
|
||||
|
||||
/**
|
||||
* BLE stack Options flags to be configured with:
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3
|
||||
* which are used to set following configuration bits:
|
||||
* (bit 0): 1: LL only
|
||||
* 0: LL + host
|
||||
* (bit 1): 1: no service change desc.
|
||||
* 0: with service change desc.
|
||||
* (bit 2): 1: device name Read-Only
|
||||
* 0: device name R/W
|
||||
* (bit 3): 1: extended advertizing supported
|
||||
* 0: extended advertizing not supported
|
||||
* (bit 4): 1: CS Algo #2 supported
|
||||
* 0: CS Algo #2 not supported
|
||||
* (bit 5): 1: Reduced GATT database in NVM
|
||||
* 0: Full GATT database in NVM
|
||||
* (bit 6): 1: GATT caching is used
|
||||
* 0: GATT caching is not used
|
||||
* (bit 7): 1: LE Power Class 1
|
||||
* 0: LE Power Class 2-3
|
||||
* other bits: complete with Options_extension flag
|
||||
*/
|
||||
#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3)
|
||||
|
||||
/**
|
||||
* BLE stack Options_extension flags to be configured with:
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED
|
||||
* - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED
|
||||
* which are used to set following configuration bits:
|
||||
* (bit 0): 1: appearance Writable
|
||||
* 0: appearance Read-Only
|
||||
* (bit 1): 1: Enhanced ATT supported
|
||||
* 0: Enhanced ATT not supported
|
||||
* other bits: reserved (shall be set to 0)
|
||||
*/
|
||||
#define CFG_BLE_OPTIONS_EXT (SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY | SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED)
|
||||
|
||||
#define CFG_BLE_MAX_COC_INITIATOR_NBR (32)
|
||||
|
||||
#define CFG_BLE_MIN_TX_POWER (0)
|
||||
|
||||
#define CFG_BLE_MAX_TX_POWER (0)
|
||||
|
||||
/**
|
||||
* BLE stack Maximum number of created Enhanced ATT bearers to be configured
|
||||
* in addition to the number of links
|
||||
* - Range: 0 .. 4
|
||||
*/
|
||||
#define CFG_BLE_MAX_ADD_EATT_BEARERS (4)
|
||||
|
||||
/**
|
||||
* BLE Rx model configuration flags to be configured with:
|
||||
* - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY
|
||||
* - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER
|
||||
* which are used to set following configuration bits:
|
||||
* (bit 0): 1: agc_rssi model improved vs RF blockers
|
||||
* 0: Legacy agc_rssi model
|
||||
* other bits: reserved (shall be set to 0)
|
||||
*/
|
||||
|
||||
#define CFG_BLE_RX_MODEL_CONFIG (SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY)
|
||||
|
||||
/* Maximum number of advertising sets.
|
||||
* Range: 1 .. 8 with limitation:
|
||||
* This parameter is linked to CFG_BLE_MAX_ADV_DATA_LEN such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based
|
||||
* on Max Extended advertising configuration supported.
|
||||
* This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set
|
||||
*/
|
||||
|
||||
#define CFG_BLE_MAX_ADV_SET_NBR (3)
|
||||
|
||||
/* Maximum advertising data length (in bytes)
|
||||
* Range: 31 .. 1650 with limitation:
|
||||
* This parameter is linked to CFG_BLE_MAX_ADV_SET_NBR such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based
|
||||
* on Max Extended advertising configuration supported.
|
||||
* This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set
|
||||
*/
|
||||
|
||||
#define CFG_BLE_MAX_ADV_DATA_LEN (1650)
|
||||
|
||||
/* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB.
|
||||
* Range: -1280 .. 1280
|
||||
*/
|
||||
|
||||
#define CFG_BLE_TX_PATH_COMPENS (0)
|
||||
|
||||
/* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB.
|
||||
* Range: -1280 .. 1280
|
||||
*/
|
||||
|
||||
#define CFG_BLE_RX_PATH_COMPENS (0)
|
||||
|
||||
/* BLE core version (16-bit signed integer).
|
||||
* - SHCI_C2_BLE_INIT_BLE_CORE_5_2
|
||||
* - SHCI_C2_BLE_INIT_BLE_CORE_5_3
|
||||
* - SHCI_C2_BLE_INIT_BLE_CORE_5_4
|
||||
* which are used to set: 11(5.2), 12(5.3), 13(5.4).
|
||||
*/
|
||||
|
||||
#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_4)
|
||||
|
||||
/******************************************************************************
|
||||
* Transport Layer
|
||||
******************************************************************************/
|
||||
/**
|
||||
* Queue length of BLE Event
|
||||
* This parameter defines the number of asynchronous events that can be stored in the HCI layer before
|
||||
* being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
|
||||
* is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
|
||||
* enough to store all asynchronous events received in between.
|
||||
* When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
|
||||
* between the HCI command and its event.
|
||||
* This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
|
||||
* the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
|
||||
* for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
|
||||
* to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
|
||||
*/
|
||||
#define CFG_TLBLE_EVT_QUEUE_LENGTH 5
|
||||
/**
|
||||
* This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
|
||||
* allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
|
||||
* It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
|
||||
* never be used)
|
||||
* It shall be at least 4 to receive the command status event in one frame.
|
||||
* The default value is set to 27 to allow receiving an event of MTU size in a single buffer. This value maybe reduced
|
||||
* further depending on the application.
|
||||
*/
|
||||
#define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE 255 /**< Set to 255 with the memory manager and the mailbox */
|
||||
|
||||
#define TL_BLE_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE )
|
||||
/******************************************************************************
|
||||
* UART interfaces
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* Select UART interfaces
|
||||
*/
|
||||
#define CFG_DEBUG_TRACE_UART 0
|
||||
#define CFG_CONSOLE_MENU 0
|
||||
/******************************************************************************
|
||||
* USB interface
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* Enable/Disable USB interface
|
||||
*/
|
||||
#define CFG_USB_INTERFACE_ENABLE 0
|
||||
|
||||
/******************************************************************************
|
||||
* IPCC interface
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* The IPCC is dedicated to the communication between the CPU2 and the CPU1
|
||||
* and shall not be modified by the application
|
||||
* The two following definitions shall not be modified
|
||||
*/
|
||||
#define HAL_IPCC_TX_IRQHandler(...) HW_IPCC_Tx_Handler( )
|
||||
#define HAL_IPCC_RX_IRQHandler(...) HW_IPCC_Rx_Handler( )
|
||||
|
||||
/******************************************************************************
|
||||
* Low Power
|
||||
******************************************************************************/
|
||||
/**
|
||||
* When set to 1, the low power mode is enable
|
||||
* When set to 0, the device stays in RUN mode
|
||||
*/
|
||||
#define CFG_LPM_SUPPORTED 0
|
||||
|
||||
/******************************************************************************
|
||||
* RTC interface
|
||||
******************************************************************************/
|
||||
#define HAL_RTCEx_WakeUpTimerIRQHandler(...) HW_TS_RTC_Wakeup_Handler( )
|
||||
|
||||
/******************************************************************************
|
||||
* Timer Server
|
||||
******************************************************************************/
|
||||
/**
|
||||
* CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
|
||||
* The lower is the value, the better is the power consumption and the accuracy of the timerserver
|
||||
* The higher is the value, the finest is the granularity
|
||||
*
|
||||
* CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to output
|
||||
* clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
|
||||
* the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
|
||||
*
|
||||
* CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
|
||||
* When the 1Hz calendar clock is required, it shall be sets according to other settings
|
||||
* When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
|
||||
*
|
||||
* CFG_RTCCLK_DIVIDER_CONF:
|
||||
* Shall be set to either 0,2,4,8,16
|
||||
* When set to either 2,4,8,16, the 1Hhz calendar is supported
|
||||
* When set to 0, the user sets its own configuration
|
||||
*
|
||||
* The following settings are computed with LSI as input to the RTC
|
||||
*/
|
||||
|
||||
#define CFG_RTCCLK_DIVIDER_CONF 0
|
||||
|
||||
#if (CFG_RTCCLK_DIVIDER_CONF == 0)
|
||||
/**
|
||||
* Custom configuration
|
||||
* It does not support 1Hz calendar
|
||||
* It divides the RTC CLK by 16
|
||||
*/
|
||||
|
||||
#define CFG_RTCCLK_DIV (16)
|
||||
#define CFG_RTC_WUCKSEL_DIVIDER (0)
|
||||
#define CFG_RTC_ASYNCH_PRESCALER (0x0F)
|
||||
#define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
|
||||
|
||||
#else
|
||||
|
||||
#if (CFG_RTCCLK_DIVIDER_CONF == 2)
|
||||
/**
|
||||
* It divides the RTC CLK by 2
|
||||
*/
|
||||
#define CFG_RTC_WUCKSEL_DIVIDER (3)
|
||||
#endif
|
||||
|
||||
#if (CFG_RTCCLK_DIVIDER_CONF == 4)
|
||||
/**
|
||||
* It divides the RTC CLK by 4
|
||||
*/
|
||||
#define CFG_RTC_WUCKSEL_DIVIDER (2)
|
||||
#endif
|
||||
|
||||
#if (CFG_RTCCLK_DIVIDER_CONF == 8)
|
||||
/**
|
||||
* It divides the RTC CLK by 8
|
||||
*/
|
||||
#define CFG_RTC_WUCKSEL_DIVIDER (1)
|
||||
#endif
|
||||
|
||||
#if (CFG_RTCCLK_DIVIDER_CONF == 16)
|
||||
/**
|
||||
* It divides the RTC CLK by 16
|
||||
*/
|
||||
#define CFG_RTC_WUCKSEL_DIVIDER (0)
|
||||
#endif
|
||||
|
||||
#define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
|
||||
#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
|
||||
#define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
|
||||
|
||||
#endif
|
||||
|
||||
/** tick timer values */
|
||||
#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
|
||||
#define CFG_TS_TICK_VAL_PS DIVR( ((uint64_t)CFG_RTCCLK_DIV * 1e12), (uint64_t)LSE_VALUE )
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CFG_TIM_PROC_ID_ISR,
|
||||
/* USER CODE BEGIN CFG_TimProcID_t */
|
||||
|
||||
/* USER CODE END CFG_TimProcID_t */
|
||||
} CFG_TimProcID_t;
|
||||
|
||||
/******************************************************************************
|
||||
* Debug
|
||||
******************************************************************************/
|
||||
/**
|
||||
* When set, this resets some hw resources to put the device in the same state as at power up.
|
||||
* It resets only register that may prevent the FW to run properly.
|
||||
*
|
||||
* This shall be set to 0 in a final product
|
||||
*
|
||||
*/
|
||||
#define CFG_HW_RESET_BY_FW 0
|
||||
|
||||
/**
|
||||
* keep debugger enabled while in any low power mode when set to 1
|
||||
* should be set to 0 in production
|
||||
*/
|
||||
#define CFG_DEBUGGER_SUPPORTED 1
|
||||
|
||||
/**
|
||||
* When set to 1, the traces are enabled in the BLE services
|
||||
*/
|
||||
#define CFG_DEBUG_BLE_TRACE 0
|
||||
|
||||
/**
|
||||
* Enable or Disable traces in application
|
||||
*/
|
||||
#define CFG_DEBUG_APP_TRACE 0
|
||||
|
||||
#if (CFG_DEBUG_APP_TRACE != 0)
|
||||
#define APP_DBG_MSG PRINT_MESG_DBG
|
||||
#else
|
||||
#define APP_DBG_MSG PRINT_NO_MESG
|
||||
#endif
|
||||
|
||||
#if ( (CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0) )
|
||||
#define CFG_DEBUG_TRACE 1
|
||||
#endif
|
||||
|
||||
#if (CFG_DEBUG_TRACE != 0)
|
||||
#undef CFG_LPM_SUPPORTED
|
||||
#undef CFG_DEBUGGER_SUPPORTED
|
||||
#define CFG_LPM_SUPPORTED 0
|
||||
#define CFG_DEBUGGER_SUPPORTED 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
|
||||
* When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
|
||||
*
|
||||
* When both are set to 0, no trace are output
|
||||
* When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
|
||||
*/
|
||||
#define CFG_DEBUG_TRACE_LIGHT 0
|
||||
#define CFG_DEBUG_TRACE_FULL 0
|
||||
|
||||
#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
|
||||
#undef CFG_DEBUG_TRACE_FULL
|
||||
#undef CFG_DEBUG_TRACE_LIGHT
|
||||
#define CFG_DEBUG_TRACE_FULL 0
|
||||
#define CFG_DEBUG_TRACE_LIGHT 1
|
||||
#endif
|
||||
|
||||
#if ( CFG_DEBUG_TRACE == 0 )
|
||||
#undef CFG_DEBUG_TRACE_FULL
|
||||
#undef CFG_DEBUG_TRACE_LIGHT
|
||||
#define CFG_DEBUG_TRACE_FULL 0
|
||||
#define CFG_DEBUG_TRACE_LIGHT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* When not set, the traces is looping on sending the trace over UART
|
||||
*/
|
||||
#define DBG_TRACE_USE_CIRCULAR_QUEUE 1
|
||||
|
||||
/**
|
||||
* max buffer Size to queue data traces and max data trace allowed.
|
||||
* Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
|
||||
*/
|
||||
#define DBG_TRACE_MSG_QUEUE_SIZE 4096
|
||||
#define MAX_DBG_TRACE_MSG_SIZE 1024
|
||||
|
||||
/* USER CODE BEGIN Defines */
|
||||
|
||||
/* USER CODE END Defines */
|
||||
|
||||
/******************************************************************************
|
||||
* FreeRTOS
|
||||
******************************************************************************/
|
||||
/* USER CODE BEGIN FreeRTOS */
|
||||
|
||||
/* USER CODE END FreeRTOS */
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_NAME "SHCI_USER_EVT_PROCESS"
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_ATTR_BITS (0)
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_CB_MEM (0)
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_CB_SIZE (0)
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_STACK_MEM (0)
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_PRIORITY osPriorityNone
|
||||
#define CFG_SHCI_USER_EVT_PROCESS_STACK_SIZE (128 * 20)
|
||||
|
||||
#define CFG_HCI_USER_EVT_PROCESS_NAME "HCI_USER_EVT_PROCESS"
|
||||
#define CFG_HCI_USER_EVT_PROCESS_ATTR_BITS (0)
|
||||
#define CFG_HCI_USER_EVT_PROCESS_CB_MEM (0)
|
||||
#define CFG_HCI_USER_EVT_PROCESS_CB_SIZE (0)
|
||||
#define CFG_HCI_USER_EVT_PROCESS_STACK_MEM (0)
|
||||
#define CFG_HCI_USER_EVT_PROCESS_PRIORITY osPriorityNone
|
||||
#define CFG_HCI_USER_EVT_PROCESS_STACK_SIZE (128 * 40)
|
||||
|
||||
#define CFG_ADV_UPDATE_PROCESS_NAME "ADV_UPDATE_PROCESS"
|
||||
#define CFG_ADV_UPDATE_PROCESS_ATTR_BITS (0)
|
||||
#define CFG_ADV_UPDATE_PROCESS_CB_MEM (0)
|
||||
#define CFG_ADV_UPDATE_PROCESS_CB_SIZE (0)
|
||||
#define CFG_ADV_UPDATE_PROCESS_STACK_MEM (0)
|
||||
#define CFG_ADV_UPDATE_PROCESS_PRIORITY osPriorityNone
|
||||
#define CFG_ADV_UPDATE_PROCESS_STACK_SIZE (128 * 20)
|
||||
|
||||
#define CFG_HRS_PROCESS_NAME "HRS_PROCESS"
|
||||
#define CFG_HRS_PROCESS_ATTR_BITS (0)
|
||||
#define CFG_HRS_PROCESS_CB_MEM (0)
|
||||
#define CFG_HRS_PROCESS_CB_SIZE (0)
|
||||
#define CFG_HRS_PROCESS_STACK_MEM (0)
|
||||
#define CFG_HRS_PROCESS_PRIORITY osPriorityNone
|
||||
#define CFG_HRS_PROCESS_STACK_SIZE (128 * 20)
|
||||
|
||||
/* USER CODE BEGIN FreeRTOS_Defines */
|
||||
|
||||
/* USER CODE END FreeRTOS_Defines */
|
||||
|
||||
/******************************************************************************
|
||||
* LOW POWER
|
||||
******************************************************************************/
|
||||
/**
|
||||
* Supported requester to the MCU Low Power Manager - can be increased up to 32
|
||||
* It list a bit mapping of all user of the Low Power Manager
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CFG_LPM_APP,
|
||||
CFG_LPM_APP_BLE,
|
||||
/* USER CODE BEGIN CFG_LPM_Id_t */
|
||||
|
||||
/* USER CODE END CFG_LPM_Id_t */
|
||||
} CFG_LPM_Id_t;
|
||||
|
||||
/******************************************************************************
|
||||
* OTP manager
|
||||
******************************************************************************/
|
||||
#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
|
||||
|
||||
#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
|
||||
|
||||
#endif /*APP_CONF_H */
|
||||
@@ -0,0 +1,67 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file app_debug.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header for app_debug.c module
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef APP_DEBUG_H
|
||||
#define APP_DEBUG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions ---------------------------------------------*/
|
||||
void APPD_Init( void );
|
||||
void APPD_EnableCPU2( void );
|
||||
/* USER CODE BEGIN EF */
|
||||
|
||||
/* USER CODE END EF */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /*APP_DEBUG_H */
|
||||
@@ -0,0 +1,70 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file app_entry.h
|
||||
* @author MCD Application Team
|
||||
* @brief Interface to the application
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef APP_ENTRY_H
|
||||
#define APP_ENTRY_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions ---------------------------------------------*/
|
||||
void MX_APPE_Config(void);
|
||||
void MX_APPE_Init(void);
|
||||
void Init_Exti(void);
|
||||
void Init_Smps(void);
|
||||
|
||||
/* USER CODE BEGIN EF */
|
||||
|
||||
/* USER CODE END EF */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /*APP_ENTRY_H */
|
||||
@@ -0,0 +1,170 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file hw_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief Configuration of hardware interface
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef HW_CONF_H
|
||||
#define HW_CONF_H
|
||||
|
||||
#include "FreeRTOSConfig.h"
|
||||
|
||||
/******************************************************************************
|
||||
* Semaphores
|
||||
* THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
|
||||
*****************************************************************************/
|
||||
/**
|
||||
* The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
|
||||
* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
|
||||
* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
|
||||
* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
|
||||
* + CPU1 takes CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
|
||||
* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
|
||||
* + CPU1 releases CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
|
||||
* CFG_HW_THREAD_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
|
||||
* There is no timing constraint on how long this semaphore can be kept.
|
||||
*/
|
||||
#define CFG_HW_THREAD_NVM_SRAM_SEMID 9
|
||||
|
||||
/**
|
||||
* The CPU2 may be configured to store the BLE persistent data either in internal NVM storage on CPU2 or in
|
||||
* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
|
||||
* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
|
||||
* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
|
||||
* + CPU1 takes CFG_HW_BLE_NVM_SRAM_SEMID semaphore
|
||||
* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
|
||||
* + CPU1 releases CFG_HW_BLE_NVM_SRAM_SEMID semaphore
|
||||
* CFG_HW_BLE_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
|
||||
* There is no timing constraint on how long this semaphore can be kept.
|
||||
*/
|
||||
#define CFG_HW_BLE_NVM_SRAM_SEMID 8
|
||||
|
||||
/**
|
||||
* Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash
|
||||
* The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2
|
||||
* When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just
|
||||
* after writing a raw (64bits data) or erasing one sector.
|
||||
* Once the Semaphore has been released, there shall be at least 1us before it can be taken again. This is required
|
||||
* to give the opportunity to CPU2 to take it.
|
||||
* On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit.
|
||||
* By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore
|
||||
* instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
|
||||
*/
|
||||
#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 7
|
||||
|
||||
/**
|
||||
* Index of the semaphore used by CPU1 to prevent the CPU2 to either write or erase data in flash
|
||||
* In order to protect its timing, the CPU1 may get this semaphore to prevent the CPU2 to either
|
||||
* write or erase in flash (as this will stall both CPUs)
|
||||
* The PES bit shall not be used as this may stall the CPU2 in some cases.
|
||||
*/
|
||||
#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 6
|
||||
|
||||
/**
|
||||
* Index of the semaphore used to manage the CLK48 clock configuration
|
||||
* When the USB is required, this semaphore shall be taken before configuring te CLK48 for USB
|
||||
* and should be released after the application switch OFF the clock when the USB is not used anymore
|
||||
* When using the RNG, it is good enough to use CFG_HW_RNG_SEMID to control CLK48.
|
||||
* More details in AN5289
|
||||
*/
|
||||
#define CFG_HW_CLK48_CONFIG_SEMID 5
|
||||
|
||||
/* Index of the semaphore used to manage the entry Stop Mode procedure */
|
||||
#define CFG_HW_ENTRY_STOP_MODE_SEMID 4
|
||||
|
||||
/* Index of the semaphore used to access the RCC */
|
||||
#define CFG_HW_RCC_SEMID 3
|
||||
|
||||
/* Index of the semaphore used to access the FLASH */
|
||||
#define CFG_HW_FLASH_SEMID 2
|
||||
|
||||
/* Index of the semaphore used to access the PKA */
|
||||
#define CFG_HW_PKA_SEMID 1
|
||||
|
||||
/* Index of the semaphore used to access the RNG */
|
||||
#define CFG_HW_RNG_SEMID 0
|
||||
|
||||
/******************************************************************************
|
||||
* HW TIMER SERVER
|
||||
*****************************************************************************/
|
||||
/**
|
||||
* The user may define the maximum number of virtual timers supported.
|
||||
* It shall not exceed 255
|
||||
*/
|
||||
#define CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER 6
|
||||
|
||||
/**
|
||||
* The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
|
||||
* wakeup timer.
|
||||
* This setting is the preemptpriority part of the NVIC.
|
||||
*/
|
||||
#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1) /* FreeRTOS requirement */
|
||||
|
||||
/**
|
||||
* The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
|
||||
* wakeup timer.
|
||||
* This setting is the subpriority part of the NVIC. It does not exist on all processors. When it is not supported
|
||||
* on the CPU, the setting is ignored
|
||||
*/
|
||||
#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO 0
|
||||
|
||||
/**
|
||||
* Define a critical section in the Timer server
|
||||
* The Timer server does not support the API to be nested
|
||||
* The Application shall either:
|
||||
* a) Ensure this will never happen
|
||||
* b) Define the critical section
|
||||
* The default implementations is masking all interrupts using the PRIMASK bit
|
||||
* The TimerServer driver uses critical sections to avoid context corruption. This is achieved with the macro
|
||||
* TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION. When CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION is set
|
||||
* to 1, all STM32 interrupts are masked with the PRIMASK bit of the CortexM CPU. It is possible to use the BASEPRI
|
||||
* register of the CortexM CPU to keep allowed some interrupts with high priority. In that case, the user shall
|
||||
* re-implement TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION and shall make sure that no TimerServer
|
||||
* API are called when the TIMER critical section is entered
|
||||
*/
|
||||
#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION 1
|
||||
|
||||
/**
|
||||
* This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt
|
||||
* is generated by the Hardware and the time when the RTC interrupt handler is called. This time is measured in
|
||||
* number of RTCCLK ticks.
|
||||
* A relaxed timing would be 10ms
|
||||
* When the value is too short, the timerserver will not be able to count properly and all timeout may be random.
|
||||
* When the value is too long, the device may wake up more often than the most optimal configuration. However, the
|
||||
* impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly
|
||||
* recommended to select a value large enough to make sure it is not too short to ensure reliability of the system
|
||||
* as this will have marginal impact on low power mode
|
||||
*/
|
||||
#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY ( 10 * (LSI_VALUE/1000) )
|
||||
|
||||
/**
|
||||
* Interrupt ID in the NVIC of the RTC Wakeup interrupt handler
|
||||
* It shall be type of IRQn_Type
|
||||
*/
|
||||
#define CFG_HW_TS_RTC_WAKEUP_HANDLER_ID RTC_WKUP_IRQn
|
||||
|
||||
/******************************************************************************
|
||||
* HW UART
|
||||
*****************************************************************************/
|
||||
#define CFG_HW_LPUART1_ENABLED 0
|
||||
#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 0
|
||||
|
||||
#define CFG_HW_USART1_ENABLED 0
|
||||
#define CFG_HW_USART1_DMA_TX_SUPPORTED 0
|
||||
|
||||
#endif /*HW_CONF_H */
|
||||
@@ -0,0 +1,247 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file hw_if.h
|
||||
* @author MCD Application Team
|
||||
* @brief Hardware Interface
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef HW_IF_H
|
||||
#define HW_IF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32wbxx.h"
|
||||
#include "stm32wbxx_ll_exti.h"
|
||||
#include "stm32wbxx_ll_system.h"
|
||||
#include "stm32wbxx_ll_rcc.h"
|
||||
#include "stm32wbxx_ll_ipcc.h"
|
||||
#include "stm32wbxx_ll_bus.h"
|
||||
#include "stm32wbxx_ll_pwr.h"
|
||||
#include "stm32wbxx_ll_cortex.h"
|
||||
#include "stm32wbxx_ll_utils.h"
|
||||
#include "stm32wbxx_ll_hsem.h"
|
||||
#include "stm32wbxx_ll_gpio.h"
|
||||
#include "stm32wbxx_ll_rtc.h"
|
||||
|
||||
#ifdef USE_STM32WBXX_USB_DONGLE
|
||||
#include "stm32wbxx_usb_dongle.h"
|
||||
#endif
|
||||
#ifdef USE_STM32WBXX_NUCLEO
|
||||
#include "stm32wbxx_nucleo.h"
|
||||
#endif
|
||||
#ifdef USE_X_NUCLEO_EPD
|
||||
#include "x_nucleo_epd.h"
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/******************************************************************************
|
||||
* HW UART
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
hw_uart1,
|
||||
hw_uart2,
|
||||
hw_lpuart1,
|
||||
} hw_uart_id_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
hw_uart_ok,
|
||||
hw_uart_error,
|
||||
hw_uart_busy,
|
||||
hw_uart_to,
|
||||
} hw_status_t;
|
||||
|
||||
void HW_UART_Init(hw_uart_id_t hw_uart_id);
|
||||
void HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
|
||||
void HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
|
||||
hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, uint32_t timeout);
|
||||
hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*Callback)(void));
|
||||
void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id);
|
||||
void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id);
|
||||
|
||||
/******************************************************************************
|
||||
* HW TimerServer
|
||||
******************************************************************************/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/**
|
||||
* This setting is used when standby mode is supported.
|
||||
* hw_ts_InitMode_Limited should be used when the device restarts from Standby Mode. In that case, the Timer Server does
|
||||
* not re-initialized its context. Only the Hardware register which content has been lost is reconfigured
|
||||
* Otherwise, hw_ts_InitMode_Full should be requested (Start from Power ON) and everything is re-initialized.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
hw_ts_InitMode_Full,
|
||||
hw_ts_InitMode_Limited,
|
||||
} HW_TS_InitMode_t;
|
||||
|
||||
/**
|
||||
* When a Timer is created as a SingleShot timer, it is not automatically restarted when the timeout occurs. However,
|
||||
* the timer is kept reserved in the list and could be restarted at anytime with HW_TS_Start()
|
||||
*
|
||||
* When a Timer is created as a Repeated timer, it is automatically restarted when the timeout occurs.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
hw_ts_SingleShot,
|
||||
hw_ts_Repeated
|
||||
} HW_TS_Mode_t;
|
||||
|
||||
/**
|
||||
* hw_ts_Successful is returned when a Timer has been successfully created with HW_TS_Create(). Otherwise, hw_ts_Failed
|
||||
* is returned. When hw_ts_Failed is returned, that means there are not enough free slots in the list to create a
|
||||
* Timer. In that case, CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER should be increased
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
hw_ts_Successful,
|
||||
hw_ts_Failed,
|
||||
}HW_TS_ReturnStatus_t;
|
||||
|
||||
typedef void (*HW_TS_pTimerCb_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Initialize the timer server
|
||||
* This API shall be called by the application before any timer is requested to the timer server. It
|
||||
* configures the RTC module to be connected to the LSI input clock.
|
||||
*
|
||||
* @param TimerInitMode: When the device restarts from Standby, it should request hw_ts_InitMode_Limited so that the
|
||||
* Timer context is not re-initialized. Otherwise, hw_ts_InitMode_Full should be requested
|
||||
* @param hrtc: RTC Handle
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc);
|
||||
|
||||
/**
|
||||
* @brief Interface to create a virtual timer
|
||||
* The user shall call this API to create a timer. Once created, the timer is reserved to the module until it
|
||||
* has been deleted. When creating a timer, the user shall specify the mode (single shot or repeated), the
|
||||
* callback to be notified when the timer expires and a module ID to identify in the timer interrupt handler
|
||||
* which module is concerned. In return, the user gets a timer ID to handle it.
|
||||
*
|
||||
* @param TimerProcessID: This is an identifier provided by the user and returned in the callback to allow
|
||||
* identification of the requester
|
||||
* @param pTimerId: Timer Id returned to the user to request operation (start, stop, delete)
|
||||
* @param TimerMode: Mode of the virtual timer (Single shot or repeated)
|
||||
* @param pTimerCallBack: Callback when the virtual timer expires
|
||||
* @retval HW_TS_ReturnStatus_t: Return whether the creation is successful or not
|
||||
*/
|
||||
HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pTimerCallBack);
|
||||
|
||||
/**
|
||||
* @brief Stop a virtual timer
|
||||
* This API may be used to stop a running timer. A timer which is stopped is move to the pending state.
|
||||
* A pending timer may be restarted at any time with a different timeout value but the mode cannot be changed.
|
||||
* Nothing is done when it is called to stop a timer which has been already stopped
|
||||
*
|
||||
* @param TimerID: Id of the timer to stop
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Stop(uint8_t TimerID);
|
||||
|
||||
/**
|
||||
* @brief Start a virtual timer
|
||||
* This API shall be used to start a timer. The timeout value is specified and may be different each time.
|
||||
* When the timer is in the single shot mode, it will move to the pending state when it expires. The user may
|
||||
* restart it at any time with a different timeout value. When the timer is in the repeated mode, it always
|
||||
* stay in the running state. When the timer expires, it will be restarted with the same timeout value.
|
||||
* This API shall not be called on a running timer.
|
||||
*
|
||||
* @param TimerID: The ID Id of the timer to start
|
||||
* @param timeout_ticks: Number of ticks of the virtual timer (Maximum value is (0xFFFFFFFF-0xFFFF = 0xFFFF0000)
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Start(uint8_t TimerID, uint32_t timeout_ticks);
|
||||
|
||||
/**
|
||||
* @brief Delete a virtual timer from the list
|
||||
* This API should be used when a timer is not needed anymore by the user. A deleted timer is removed from
|
||||
* the timer list managed by the timer server. It cannot be restarted again. The user has to go with the
|
||||
* creation of a new timer if required and may get a different timer id
|
||||
*
|
||||
* @param TimerID: The ID of the timer to remove from the list
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Delete(uint8_t TimerID);
|
||||
|
||||
/**
|
||||
* @brief Schedule the timer list on the timer interrupt handler
|
||||
* This interrupt handler shall be called by the application in the RTC interrupt handler. This handler takes
|
||||
* care of clearing all status flag required in the RTC and EXTI peripherals
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_RTC_Wakeup_Handler(void);
|
||||
|
||||
/**
|
||||
* @brief Return the number of ticks to count before the interrupt
|
||||
* This API returns the number of ticks left to be counted before an interrupt is generated by the
|
||||
* Timer Server. This API may be used by the application for power management optimization. When the system
|
||||
* enters low power mode, the mode selection is a tradeoff between the wakeup time where the CPU is running
|
||||
* and the time while the CPU will be kept in low power mode before next wakeup. The deeper is the
|
||||
* low power mode used, the longer is the wakeup time. The low power mode management considering wakeup time
|
||||
* versus time in low power mode is implementation specific
|
||||
* When the timer is disabled (No timer in the list), it returns 0xFFFF
|
||||
*
|
||||
* @param None
|
||||
* @retval The number of ticks left to count
|
||||
*/
|
||||
uint16_t HW_TS_RTC_ReadLeftTicksToCount(void);
|
||||
|
||||
/**
|
||||
* @brief Notify the application that a registered timer has expired
|
||||
* This API shall be implemented by the user application.
|
||||
* This API notifies the application that a timer expires. This API is running in the RTC Wakeup interrupt
|
||||
* context. The application may implement an Operating System to change the context priority where the timer
|
||||
* callback may be handled. This API provides the module ID to identify which module is concerned and to allow
|
||||
* sending the information to the correct task
|
||||
*
|
||||
* @param TimerProcessID: The TimerProcessId associated with the timer when it has been created
|
||||
* @param TimerID: The TimerID of the expired timer
|
||||
* @param pTimerCallBack: The Callback associated with the timer when it has been created
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack);
|
||||
|
||||
/**
|
||||
* @brief Notify the application that the wakeupcounter has been updated
|
||||
* This API should be implemented by the user application
|
||||
* This API notifies the application that the counter has been updated. This is expected to be used along
|
||||
* with the HW_TS_RTC_ReadLeftTicksToCount () API. It could be that the counter has been updated since the
|
||||
* last call of HW_TS_RTC_ReadLeftTicksToCount () and before entering low power mode. This notification
|
||||
* provides a way to the application to solve that race condition to reevaluate the counter value before
|
||||
* entering low power mode
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_RTC_CountUpdated_AppNot(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*HW_IF_H */
|
||||
+105
@@ -0,0 +1,105 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32wbxx_hal.h"
|
||||
|
||||
#include "app_conf.h"
|
||||
#include "app_entry.h"
|
||||
#include "app_common.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
#define SPI2_SD_MOSI_Pin GPIO_PIN_1
|
||||
#define SPI2_SD_MOSI_GPIO_Port GPIOC
|
||||
#define SPI2_SD_MISO_Pin GPIO_PIN_2
|
||||
#define SPI2_SD_MISO_GPIO_Port GPIOC
|
||||
#define GPIO_CONNECT_LED_Pin GPIO_PIN_0
|
||||
#define GPIO_CONNECT_LED_GPIO_Port GPIOA
|
||||
#define GPIO_STATUS_LED_Pin GPIO_PIN_1
|
||||
#define GPIO_STATUS_LED_GPIO_Port GPIOA
|
||||
#define GPIO_DEBUG_LED_Pin GPIO_PIN_2
|
||||
#define GPIO_DEBUG_LED_GPIO_Port GPIOA
|
||||
#define GPIO_SPI1_IMU_CS_Pin GPIO_PIN_3
|
||||
#define GPIO_SPI1_IMU_CS_GPIO_Port GPIOA
|
||||
#define SPI1_IMU_SCK_Pin GPIO_PIN_5
|
||||
#define SPI1_IMU_SCK_GPIO_Port GPIOA
|
||||
#define SPI1_IMU_MISO_Pin GPIO_PIN_6
|
||||
#define SPI1_IMU_MISO_GPIO_Port GPIOA
|
||||
#define SPI1_IMU_MOSI_Pin GPIO_PIN_7
|
||||
#define SPI1_IMU_MOSI_GPIO_Port GPIOA
|
||||
#define SPI2_SD_SCK_Pin GPIO_PIN_9
|
||||
#define SPI2_SD_SCK_GPIO_Port GPIOA
|
||||
#define GPIO_SPI2_SD_CD_Pin GPIO_PIN_5
|
||||
#define GPIO_SPI2_SD_CD_GPIO_Port GPIOC
|
||||
#define GPIO_SPI2_SD_CS_Pin GPIO_PIN_6
|
||||
#define GPIO_SPI2_SD_CS_GPIO_Port GPIOC
|
||||
#define GPIO_IMU_INT_Pin GPIO_PIN_10
|
||||
#define GPIO_IMU_INT_GPIO_Port GPIOA
|
||||
#define GPIO_MAGN_INT_Pin GPIO_PIN_11
|
||||
#define GPIO_MAGN_INT_GPIO_Port GPIOC
|
||||
#define GPIO_SD_LDO_EN_Pin GPIO_PIN_12
|
||||
#define GPIO_SD_LDO_EN_GPIO_Port GPIOC
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
@@ -0,0 +1,80 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32_lpm_if.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header for stm32_lpm_if.c module (device specific LP management)
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32_LPM_IF_H
|
||||
#define STM32_LPM_IF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Enters Low Power Off Mode
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_EnterOffMode( void );
|
||||
/**
|
||||
* @brief Exits Low Power Off Mode
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_ExitOffMode( void );
|
||||
|
||||
/**
|
||||
* @brief Enters Low Power Stop Mode
|
||||
* @note ARM exists the function when waking up
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_EnterStopMode( void );
|
||||
/**
|
||||
* @brief Exits Low Power Stop Mode
|
||||
* @note Enable the pll at 32MHz
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_ExitStopMode( void );
|
||||
|
||||
/**
|
||||
* @brief Enters Low Power Sleep Mode
|
||||
* @note ARM exits the function when waking up
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_EnterSleepMode( void );
|
||||
|
||||
/**
|
||||
* @brief Exits Low Power Sleep Mode
|
||||
* @note ARM exits the function when waking up
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_ExitSleepMode( void );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*STM32_LPM_IF_H */
|
||||
|
||||
@@ -0,0 +1,352 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32wbxx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32WBxx_HAL_CONF_H
|
||||
#define __STM32WBxx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_COMP_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
#define HAL_HSEM_MODULE_ENABLED
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
#define HAL_IPCC_MODULE_ENABLED
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
/*#define HAL_LCD_MODULE_ENABLED */
|
||||
/*#define HAL_LPTIM_MODULE_ENABLED */
|
||||
#define HAL_PCD_MODULE_ENABLED
|
||||
/*#define HAL_PKA_MODULE_ENABLED */
|
||||
/*#define HAL_QSPI_MODULE_ENABLED */
|
||||
/*#define HAL_RNG_MODULE_ENABLED */
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
/*#define HAL_SAI_MODULE_ENABLED */
|
||||
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/*#define HAL_TSC_MODULE_ENABLED */
|
||||
/*#define HAL_UART_MODULE_ENABLED */
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_PKA_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_TSC_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 32000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (MSI) default value.
|
||||
* This value is the default MSI range value after Reset.
|
||||
*/
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI1) value.
|
||||
*/
|
||||
#if !defined (LSI1_VALUE)
|
||||
#define LSI1_VALUE ((uint32_t)32000) /*!< LSI1 Typical Value in Hz*/
|
||||
#endif /* LSI1_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI2) value.
|
||||
*/
|
||||
#if !defined (LSI2_VALUE)
|
||||
#define LSI2_VALUE ((uint32_t)32000) /*!< LSI2 Typical Value in Hz*/
|
||||
#endif /* LSI2_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (HSI48) default value.
|
||||
* This value is the default HSI48 range value after Reset.
|
||||
*/
|
||||
#if !defined (HSI48_VALUE)
|
||||
#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI48_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for SAI1 peripheral
|
||||
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
|
||||
* frequency.
|
||||
*/
|
||||
#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
|
||||
#define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000) /*!< Value of the SAI1 External clock source in Hz*/
|
||||
#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_hsem.h"
|
||||
#endif /* HAL_HSEM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IPCC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_ipcc.h"
|
||||
#endif /* HAL_IPCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LCD_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_lcd.h"
|
||||
#endif /* HAL_LCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PKA_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_pka.h"
|
||||
#endif /* HAL_PKA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_tsc.h"
|
||||
#endif /* HAL_TSC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32WBxx_HAL_CONF_H */
|
||||
@@ -0,0 +1,75 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32wbxx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32WBxx_IT_H
|
||||
#define __STM32WBxx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void RTC_WKUP_IRQHandler(void);
|
||||
void DMA1_Channel1_IRQHandler(void);
|
||||
void DMA1_Channel2_IRQHandler(void);
|
||||
void DMA1_Channel3_IRQHandler(void);
|
||||
void DMA1_Channel4_IRQHandler(void);
|
||||
void USB_LP_IRQHandler(void);
|
||||
void TIM1_UP_TIM16_IRQHandler(void);
|
||||
void I2C1_EV_IRQHandler(void);
|
||||
void I2C1_ER_IRQHandler(void);
|
||||
void IPCC_C1_RX_IRQHandler(void);
|
||||
void IPCC_C1_TX_IRQHandler(void);
|
||||
void HSEM_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32WBxx_IT_H */
|
||||
@@ -0,0 +1,65 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file utilities_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief Configuration file for STM32 Utilities.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
*****************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef UTILITIES_CONF_H
|
||||
#define UTILITIES_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "cmsis_compiler.h"
|
||||
#include "string.h"
|
||||
#include "app_conf.h"
|
||||
/******************************************************************************
|
||||
* common
|
||||
******************************************************************************/
|
||||
#define UTILS_ENTER_CRITICAL_SECTION( ) uint32_t primask_bit = __get_PRIMASK( );\
|
||||
__disable_irq( )
|
||||
|
||||
#define UTILS_EXIT_CRITICAL_SECTION( ) __set_PRIMASK( primask_bit )
|
||||
|
||||
#define UTILS_MEMSET8( dest, value, size ) memset( dest, value, size);
|
||||
|
||||
/******************************************************************************
|
||||
* tiny low power manager
|
||||
* (any macro that does not need to be modified can be removed)
|
||||
******************************************************************************/
|
||||
#define UTIL_LPM_INIT_CRITICAL_SECTION( )
|
||||
#define UTIL_LPM_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
|
||||
#define UTIL_LPM_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
|
||||
|
||||
/******************************************************************************
|
||||
* sequencer
|
||||
* (any macro that does not need to be modified can be removed)
|
||||
******************************************************************************/
|
||||
#define UTIL_SEQ_INIT_CRITICAL_SECTION( )
|
||||
#define UTIL_SEQ_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
|
||||
#define UTIL_SEQ_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
|
||||
#define UTIL_SEQ_CONF_TASK_NBR (32)
|
||||
#define UTIL_SEQ_CONF_PRIO_NBR CFG_SCH_PRIO_NBR
|
||||
#define UTIL_SEQ_MEMSET8( dest, value, size ) UTILS_MEMSET8( dest, value, size )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*UTILITIES_CONF_H */
|
||||
Reference in New Issue
Block a user