Rebuild trinity visualizer from bare SDL and OpenGL to using Raylib. Added Code for serial parsing on linux. Current functionality reads incoming quaternion packet data coming in over serial and displays the values and also visualizes with a cube, connect and disconnect is implemented. Essentially rebuild the functionality of the old version with added linux support.
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/// @ref simd_neon
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/// @file glm/simd/neon.h
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#pragma once
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#if GLM_ARCH & GLM_ARCH_NEON_BIT
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#include <arm_neon.h>
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namespace glm {
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namespace neon {
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static inline float32x4_t dupq_lane(float32x4_t vsrc, int lane) {
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switch(lane) {
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default: assert(false); //Unreachable code executed!
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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case 0: return vdupq_laneq_f32(vsrc, 0);
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case 1: return vdupq_laneq_f32(vsrc, 1);
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case 2: return vdupq_laneq_f32(vsrc, 2);
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case 3: return vdupq_laneq_f32(vsrc, 3);
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#else
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case 0: return vdupq_n_f32(vgetq_lane_f32(vsrc, 0));
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case 1: return vdupq_n_f32(vgetq_lane_f32(vsrc, 1));
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case 2: return vdupq_n_f32(vgetq_lane_f32(vsrc, 2));
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case 3: return vdupq_n_f32(vgetq_lane_f32(vsrc, 3));
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#endif
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}
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return vdupq_n_f32(0.0f);
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}
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static inline float32x2_t dup_lane(float32x4_t vsrc, int lane) {
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switch(lane) {
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default: assert(false); //Unreachable code executed!
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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case 0: return vdup_laneq_f32(vsrc, 0);
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case 1: return vdup_laneq_f32(vsrc, 1);
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case 2: return vdup_laneq_f32(vsrc, 2);
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case 3: return vdup_laneq_f32(vsrc, 3);
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#else
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case 0: return vdup_n_f32(vgetq_lane_f32(vsrc, 0));
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case 1: return vdup_n_f32(vgetq_lane_f32(vsrc, 1));
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case 2: return vdup_n_f32(vgetq_lane_f32(vsrc, 2));
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case 3: return vdup_n_f32(vgetq_lane_f32(vsrc, 3));
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#endif
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}
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return vdup_n_f32(0.0f);
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}
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static inline float32x4_t copy_lane(float32x4_t vdst, int dlane, float32x4_t vsrc, int slane) {
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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switch(dlane) {
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default:
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case 0:
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switch(slane) {
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default: assert(false); //Unreachable code executed!
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case 0: return vcopyq_laneq_f32(vdst, 0, vsrc, 0);
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case 1: return vcopyq_laneq_f32(vdst, 0, vsrc, 1);
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case 2: return vcopyq_laneq_f32(vdst, 0, vsrc, 2);
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case 3: return vcopyq_laneq_f32(vdst, 0, vsrc, 3);
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}
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break;
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case 1:
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switch(slane) {
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default: assert(false); //Unreachable code executed!
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case 0: return vcopyq_laneq_f32(vdst, 1, vsrc, 0);
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case 1: return vcopyq_laneq_f32(vdst, 1, vsrc, 1);
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case 2: return vcopyq_laneq_f32(vdst, 1, vsrc, 2);
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case 3: return vcopyq_laneq_f32(vdst, 1, vsrc, 3);
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}
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break;
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case 2:
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switch(slane) {
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default: assert(false); //Unreachable code executed!
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case 0: return vcopyq_laneq_f32(vdst, 2, vsrc, 0);
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case 1: return vcopyq_laneq_f32(vdst, 2, vsrc, 1);
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case 2: return vcopyq_laneq_f32(vdst, 2, vsrc, 2);
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case 3: return vcopyq_laneq_f32(vdst, 2, vsrc, 3);
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}
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break;
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case 3:
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switch(slane) {
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default: assert(false); //Unreachable code executed!
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case 0: return vcopyq_laneq_f32(vdst, 3, vsrc, 0);
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case 1: return vcopyq_laneq_f32(vdst, 3, vsrc, 1);
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case 2: return vcopyq_laneq_f32(vdst, 3, vsrc, 2);
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case 3: return vcopyq_laneq_f32(vdst, 3, vsrc, 3);
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}
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break;
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}
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#else
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float l;
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switch(slane) {
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default: assert(false); //Unreachable code executed!
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case 0: l = vgetq_lane_f32(vsrc, 0); break;
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case 1: l = vgetq_lane_f32(vsrc, 1); break;
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case 2: l = vgetq_lane_f32(vsrc, 2); break;
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case 3: l = vgetq_lane_f32(vsrc, 3); break;
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}
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switch(dlane) {
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default: assert(false); //Unreachable code executed!
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case 0: return vsetq_lane_f32(l, vdst, 0);
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case 1: return vsetq_lane_f32(l, vdst, 1);
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case 2: return vsetq_lane_f32(l, vdst, 2);
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case 3: return vsetq_lane_f32(l, vdst, 3);
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}
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#endif
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return vdupq_n_f32(0.0f);
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}
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static inline float32x4_t mul_lane(float32x4_t v, float32x4_t vlane, int lane) {
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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switch(lane) {
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default: assert(false); return vdupq_n_f32(0.0f); //Unreachable code executed!
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case 0: return vmulq_laneq_f32(v, vlane, 0); break;
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case 1: return vmulq_laneq_f32(v, vlane, 1); break;
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case 2: return vmulq_laneq_f32(v, vlane, 2); break;
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case 3: return vmulq_laneq_f32(v, vlane, 3); break;
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}
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#else
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return vmulq_f32(v, dupq_lane(vlane, lane));
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#endif
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}
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static inline float32x4_t madd_lane(float32x4_t acc, float32x4_t v, float32x4_t vlane, int lane) {
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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#ifdef GLM_CONFIG_FORCE_FMA
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# define FMADD_LANE(acc, x, y, L) do { asm volatile ("fmla %0.4s, %1.4s, %2.4s" : "+w"(acc) : "w"(x), "w"(dup_lane(y, L))); } while(0)
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#else
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# define FMADD_LANE(acc, x, y, L) do { acc = vmlaq_laneq_f32(acc, x, y, L); } while(0)
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#endif
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switch(lane) {
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case 0:
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FMADD_LANE(acc, v, vlane, 0);
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return acc;
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case 1:
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FMADD_LANE(acc, v, vlane, 1);
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return acc;
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case 2:
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FMADD_LANE(acc, v, vlane, 2);
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return acc;
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case 3:
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FMADD_LANE(acc, v, vlane, 3);
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return acc;
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default:
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assert(false); //Unreachable code executed!
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}
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return vdupq_n_f32(0.0f);
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# undef FMADD_LANE
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#else
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return vaddq_f32(acc, vmulq_f32(v, dupq_lane(vlane, lane)));
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#endif
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}
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} //namespace neon
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} // namespace glm
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#endif // GLM_ARCH & GLM_ARCH_NEON_BIT
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